dc.contributor.author |
W.D. Asanka S. Rodrigo and A.G.C.U. Perera |
|
dc.date.accessioned |
2019-07-11T03:50:01Z |
|
dc.date.available |
2019-07-11T03:50:01Z |
|
dc.identifier.uri |
http://dl.lib.mrt.ac.lk/handle/123/14557 |
|
dc.description.abstract |
The India-Sri Lanka HVDC interconnections will be the largest power generation that
has being proposed for the Sri Lankan power system. Properly selected configurations for the
proposed link provide reliability for the link. This paper presents the modelling analysis for the
selected physical configurations for the study. The aim of this research study is to investigate the
impact on inverter side Sri Lankan network by this interconnection. This paper presents the
performance analysis of the HVDC power and voltage at interconnected Sri Lankan terminal bus bar.
It was found that with the properly selected system parameters, the HVDC link can operate
asynchronously and behaves as it proved in references. The interconnection was modelled in
PSCAD/EMTDC software and analysed the modelled components and simulation results under the
steady state condition and perturbed conditions, in this paper. The analytical results were verified
using time domain simulations.. |
en_US |
dc.language.iso |
en |
en_US |
dc.subject |
HVDC |
en_US |
dc.subject |
CSC |
|
dc.subject |
SCR |
|
dc.subject |
VDCL |
|
dc.subject |
ISE |
|
dc.subject |
time domain analysis |
|
dc.title |
Dynamic performance of India – Sri Lanka HVDC interconnection : system modelling and simulation |
en_US |
dc.type |
Article-Abstract |
en_US |
dc.identifier.year |
2015 |
en_US |
dc.identifier.journal |
Annual Transactions of IESL, The Institution of Engineers, Sri Lanka - 2015 |
en_US |
dc.identifier.issue |
pt. B |
en_US |
dc.identifier.volume |
vol. 1 |
en_US |
dc.identifier.pgnos |
pp. 521 - 529 |
en_US |