dc.contributor.author |
Wijenayake, C |
|
dc.contributor.author |
Liyanage, N |
|
dc.contributor.author |
Edussooriya, C |
|
dc.contributor.author |
Seatang, H |
|
dc.contributor.author |
Agathoklis, P |
|
dc.contributor.author |
Bruton, L |
|
dc.date.accessioned |
2023-04-24T06:29:05Z |
|
dc.date.available |
2023-04-24T06:29:05Z |
|
dc.date.issued |
2019 |
|
dc.identifier.citation |
Wijenayake, C., Liyanage, N., Edussooriya, C. U. S., Seatang, H., Agathoklis, P., & Bruton, L. T. (2019). Design and Implementation of 5-D IIR Depth Velocity Filters for Light Field Video Processing. IEEE Transactions on Circuits and Systems II: Express Briefs, 66(7), 1267–1271. https://doi.org/10.1109/TCSII.2018.2874940 |
en_US |
dc.identifier.issn |
1549-7747 |
en_US |
dc.identifier.uri |
http://dl.lib.uom.lk/handle/123/20933 |
|
dc.description.abstract |
The design and hardware implementation of a lowcomplexity
signal processing algorithm is proposed for real-time
depth-velocity filtering in 5-D light field videos (LFVs). The
proposed design is based on a stable 5-D infinite impulse response
(IIR) digital filter having three cascaded sections, each synthesized
using the concept of multidimensional passive network
resonance. A novel semi-systolic hardware implementation is
proposed. Each section of the filter is implemented and tested on
a Xilinx Virtex-7 FPGA platform using Matlab based hardware
co-simulation with both synthetic and real LFV signals. A realtime
processing throughput of 467 LFV frames/s is implied with
each section of the filter operating at 204, 164 and 115 MHz for
input LFV frames of size 9×9×220×360. |
en_US |
dc.language.iso |
en |
en_US |
dc.publisher |
Institute of Electrical and Electronics Engineers Inc. |
en_US |
dc.subject |
Light field videos |
en_US |
dc.subject |
depth-velocity filters |
en_US |
dc.subject |
FPGA. |
en_US |
dc.title |
Design and Implementation of 5-D IIR Depth Velocity Filters for Light Field Video Processing |
en_US |
dc.type |
Article-Full-text |
en_US |
dc.identifier.year |
2019 |
en_US |
dc.identifier.journal |
IEEE Transactions on Circuits and Systems II: Express Briefs |
en_US |
dc.identifier.issue |
7 |
en_US |
dc.identifier.volume |
66 |
en_US |
dc.identifier.pgnos |
1267–1271. |
en_US |
dc.identifier.doi |
https://doi.org/10.1109/TCSII.2018.2874940 |
en_US |