dc.contributor.author |
Cabral, A |
|
dc.contributor.author |
Pasqual, AA |
|
dc.date.accessioned |
2013-10-21T02:12:25Z |
|
dc.date.available |
2013-10-21T02:12:25Z |
|
dc.date.issued |
2011 |
|
dc.identifier.uri |
http://dl.lib.mrt.ac.lk/handle/123/8083 |
|
dc.description.abstract |
In computer vision crass-correlation is a standard approach for local feature matching in feature tracking
applications. For this Normalized cross-correlation (NCC) is implemented on spatial domain, because it does not have
a simple and efficient frequency domain expression. Therefore in applications which demand real-time processing,
a dedicated hardware implementation of NCC is essential to meet the computational cost in spatial domain. In
this paper we present a Field Programmable Gate Array (FPGA) implementation of NCC based on the multi-port
memory controller together with Fast Normalize Cross-correlation. Practical experimentation shows that our system
can achieve frame rates closer to 100 for a search window size of 100x100 and template size of 15x15, with only
using two dual-port memories. |
|
dc.language |
en |
|
dc.title |
FPGA implementation of normalized cross-correlation for real-time template matching in dynamic search windows |
|
dc.type |
Conference-Abstract |
|
dc.identifier.year |
2011 |
|
dc.identifier.conference |
Excellence in Research, Excelling a Nation |
|
dc.identifier.place |
Faculty of Engineering, University of Moratuwa |
|
dc.identifier.pgnos |
121-124 |
|
dc.identifier.proceeding |
17th Annual Research Symposium on Excellence in Research, Excelling a Nation |
|