Hardware implementation of motion blur removal

dc.contributor.author	Chandrapala, T
dc.contributor.author	Cabral, A
dc.contributor.author	Sameera, T
dc.contributor.author	Ahangama, S
dc.contributor.author	Samarawickrama, J
dc.date.accessioned	2013-10-21T02:12:26Z
dc.date.available	2013-10-21T02:12:26Z
dc.date.issued	2011
dc.identifier.uri	http://dl.lib.mrt.ac.lk/handle/123/8087
dc.description.abstract	Motion Blur due to the relative motion between the camera and object can seriously degrade image quality. We present an FPGA based blur detection and correction algorithm which is implemented on lop of a configurable soft-processor based architecture. The system consists of two main modules. The blur detection module identifies the blur length and angle, and the restoration module uses regularized inverse filtering to remove the blur. The Processing algorithms are implemented as separate cores on the FPGA fabric where the soft processor core is only used for managing system configuration. The system can achieve a frame rate of 15fps for a 720p HD video strea
dc.language	en
dc.title	Hardware implementation of motion blur removal
dc.type	Conference-Abstract
dc.identifier.year	2011
dc.identifier.conference	Excellence in Research, Excelling a Nation
dc.identifier.place	Faculty of Engineering, University of Moratuwa
dc.identifier.pgnos	135-138
dc.identifier.proceeding	17th Annual Research Symposium on Excellence in Research, Excelling a Nation